flip package:clash-prelude

flip :: (a -> b -> c) -> b -> a -> c
clash-prelude Clash.HaskellPrelude
flip f takes its (first) two arguments in the reverse order of f. 
>>> flip (++) "hello" "world"
"worldhello"
dualFlipFlopSynchronizer :: (NFDataX a, KnownDomain dom1, KnownDomain dom2) => Clock dom1 -> Clock dom2 -> Reset dom2 -> Enable dom2 -> a -> Signal dom1 a -> Signal dom2 a
clash-prelude Clash.Explicit.Prelude Clash.Explicit.Prelude.Safe Clash.Explicit.Synchronizer
Synchronizer based on two sequentially connected flip-flops.
  • NB: This synchronizer can be used for bit-synchronization.
  • NB: Although this synchronizer does reduce metastability, it does not guarantee the proper synchronization of a whole word. For example, given that the output is sampled twice as fast as the input is running, and we have two samples in the input stream that look like:
    [0111,1000]
    But the circuit driving the input stream has a longer propagation delay on msb compared to the lsbs. What can happen is an output stream that looks like this:
    [0111,0111,0000,1000]
    Where the level-change of the msb was not captured, but the level change of the lsbs were.If you want to have safe word-synchronization use asyncFIFOSynchronizer.
dflipflop :: (KnownDomain dom, NFDataX a) => Clock dom -> Signal dom a -> Signal dom a
clash-prelude Clash.Explicit.Signal
Special version of delay that doesn't take enable signals of any kind. Initial value will be undefined.
dflipflop :: forall dom a . (HiddenClock dom, NFDataX a) => Signal dom a -> Signal dom a
clash-prelude Clash.Prelude Clash.Signal
Special version of delay that doesn't take enable signals of any kind. Initial value will be undefined.